Jetson Pinmux Customizer
Generate Jetson carrier pinmux BCT configuration from an XLSM.
The documentation requires per-pin user confirmation, prerequisite checks, a commit-preview gate, avoidance of the upstream BSP, and disclosure of output locations; it also labels data public. However, rollback, dependency provenance/integrity verification, write-permission boundaries, and recovery after failed writes are not explicit, so points are deducted.
The workflow and scripts provide useful handling for ambiguous lookups, missing matches, GPIO-incompatible pins, and missing DTSI blocks. Static code nevertheless shows a generator largely hard-coded for Thor/tegra264 despite the stated Orin-or-Thor scope, while the procedure requires atomic writes but save_session writes directly; the static ceiling also applies.
Triggers, intended scenarios, prerequisites, exclusions, and fixed-function-pad boundaries are clearly documented. There is no evidence of Chinese-language interaction or mainland-China environment support, and Orin compatibility is questionable, so points are deducted.
The skill has front matter, versioning, an Apache-2.0 declaration, procedures, gotchas, script documentation, references, and a maintenance workflow. However, the author format is incomplete; recommended Instructions and Examples sections, a changelog, and explicit maintenance ownership are absent. BENCHMARK also records these schema issues.
The intended outputs are concrete: three DTSIs, wrapper include updates, a sidecar, and one batched commit. BENCHMARK claims two positive tasks passed, but coverage is narrow and outputs are not independently reviewable here; actual Orin generation is also uncertain, so only limited credit is justified.
The files provide auditable scripts, input validation, idempotency markers, and a benchmark report. There is no committed test suite or CI covering the key paths, and the benchmark lacks enough reproduction detail, so only partial credit is warranted.
- The skill claims Orin-or-Thor support, but generate_dtsi.py uses tegra264, Thor-specific column mappings, and Thor-specific output logic; implementation must be verified or completed before Orin use.
- session.json is written directly rather than atomically, so interruption may leave partial state; temporary-file replacement and recovery handling should be added.
- BENCHMARK covers only two positive tasks and no negative tasks; its reported results do not replace this static review or independent testing.
- A commit preview gate exists, but no automatic rollback or complete backup strategy is specified; users should inspect the staged diff before committing.
What does this skill do, and when should you use it?
This skill configures SFIO, direction, and initial state for each CVM ball on a custom Jetson Orin or Thor carrier. It parses the pinmux XLSM, guides the user through a per-pin Q1–Q6 workflow, and generates pinmux, GPIO, and pad-voltage BCT DTSI files. It is intended for BSP projects that have already derived the carrier configuration; it does not edit kernel DT overlays or ODMDATA.
Reads a registered pinmux XLSM and uses the bundled modify_pinmux.py to build a carrier pinmap JSON. It looks up pins by CVM ball, Verilog name, signal, or DT pin, reporting supported SFIOs, defaults, and configurability. It interactively captures SFIO, direction, initial state, and, for configurable pads, pull, drive type, and open-drain settings. It writes the three BCT DTSIs to Linux_for_Tegra/bootloader/ and maintains session, sidecar, marker, and commit-oriented workflow state.
- A Jetson carrier-board developer needs to repurpose a CVM ball from GPIO to a peripheral function.
- A BSP engineer needs to define pin direction and power-on initial state for a custom carrier.
- An engineer receives an HSIO pin mismatch and needs to correct the allocation in the pinmux XLSM.
- A team has run `/jetson-derive-carrier` and needs to generate pinmux-side BCT DTSIs from an edited XLSM.
What are this skill's strengths and limitations?
- Uses the XLSM as the source of truth for CVM-ball configuration.
- Covers lookup, guided pin editing, DTSI generation, and workflow state handling.
- Explicitly handles fixed-function pads, GPIO-incapable pins, and idempotent regeneration.
- Generates pinmux, GPIO, and pad-voltage BCT DTSIs together.
- Requires an active profile, carrier-derivation output, and a specific BSP directory layout.
- Does not edit kernel DT overlays, ODMDATA, or `OVERLAY_DTB_FILE`.
- The supplied material gives no test suite, verified platform matrix, or detailed Orin/Thor SKU coverage.
- Some Thor module SKUs may use alternate DTSI variants, requiring manual review of warnings.
How do you install this skill?
Run npx skills add nvidia/skills --skill jetson-customize-pinmux --yes. The README does not specify a client-specific local destination; after installation, the agent loads the skill when a relevant task is encountered.
How do you use this skill?
Prepare an active profile, a Git-tracked Linux_for_Tegra/ source tree, the carrier-derived configuration references, and a registered pinmux XLSM. Install openpyxl>=3.1. Ask the agent to “configure pin”, “set SFIO”, or “set pin direction”; it then performs probe, lookup, interactive Q1–Q6 capture, and generation. Fixed-function pads skip Q4–Q6. After generation, update the .dts wrappers under bootloader/generic/BCT/ so their bare-basename #include lines reference the new DTSI files.
How does this skill compare with similar options?
Unlike the named sibling skills jetson-customize-uphy, jetson-customize-pcie, and jetson-customize-camera, this skill focuses on per-pin pinmux configuration and has no kernel-DT overlay surface or ODMDATA edit.